VLSI Architectures for Multidimensional Fourier Transform Processing

VLSI Architectures for Multidimensional Fourier Transform Processing,10.1109/TC.1987.5009467,IEEE Transactions on Computers,Izidor Gertner,Moshe Shama applications to perform two-dimensional or three-dimensional Fourier transforms. Until the advent of VLSI it was not possible to think about one chip implementation of such processes. In this paper several methods for implementing the multidimensional for the computation of the multidimensional transform is O(n² log² n). Existing nonoptimal architectures suitable for implementing the 2-D transform, the RAM array transposer, mesh connected systolic array, and the linear systolic matrix vector multiplier are discussed for area time tradeoff. The following links allow you to view full publications. These links are maintained by other sources not affiliated with Microsoft Academic Search. ] generalized this approach and proposed an architecture for the -dimensional DFT , which requires 1-D DFT units and rotator units between them... ] and in systolic architectures [2]‐[5], the throughput of the proposed scheme can be easily changed to meet the area/throughput requirements given by the applications... ] is also applicable to the -dimensional DFT with . The proposed method, however, is more flexible in that we can choose the optimal radix, which is determined in the second-level decomposition... ] and in the systolic architectures [3]‐[5], the throughput of the proposed scheme can be easily varied by using a different radix and/or a different pipeline scheme... ...The majority of the available VLSI implementations for separable transforms are based on the popular row-column approach (see for example Rao and Yip [2], Guo et al. [3], Lee et al. [4], Bhaskaran and Konstantinides [5], Gertner and Shamash [ ], and Chakrabarti and J´ aj´ a [7]), where the 2-D transform is performed in three steps: (i) 1-D transformation of the input rows, followed by (ii) intermediate result transposition ... ...In the field of computer vision and pattern recognition, there is much interest in three- or four-dimensional Fourier transforms to gain a better understanding for pattern analysis [ ...Most of the existing implementations of the row-column approach for the computation of multidimensional data require data transposition between the consecutive 1-D computations [ ...However, the multidimensional FT requires a high amount of computations which motivates us to search for efficient algorithms [ ...Therefore, the approach proposed in Section 3 (new algorithm) can be exploited to design a fully systolic VLSI architecture avoiding the transposer that is required by classical architectures [ Source.

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